Line styles represent different layers
Cross represents a contact between layers
The final cell’s size is determined by the number of routing tracks (the space needed for a wire and its required spacing)

| Stick Diagram Feature | Circuit Diagram Action |
|---|---|
| Poly over n-diffusion | Draw an nMOS transistor. |
| Poly over p-diffusion | Draw a pMOS transistor. |
| Shared Poly line | Connect the gates of those transistors. |
| Diffusion line not broken by Poly | The transistors are in parallel. |
| Diffusion line broken by Poly | The transistors are in series. |
| Metal connected to p-diffusion at top | Connect pMOS source to VDD. |
| Metal connected to n-diffusion at bottom | Connect nMOS source to GND. |
| Metal connected to diffusion via 'X' | Connect that node to the drain of a transistor. |
| Unconnected Metal line between drains | This is the Output node. |
| Poly line entering cell | This is an Input signal. |