The temporary storage and retrieval of groups of bits is done with multiple flip flops, this is a register

• At the positive edge, the register is loaded with new information (4 new bits)

  • The loading is done in parallel

• If we wish to remember the information loaded, we keep clock at zero

• We can add a control signal to the clock signal, this will determine when the clock is present

  

wire [3:0]D;
neg [3:0] Q;
always @ (posedge clock)
	Q <=D;

Shift Register

Register that has the ability to shift its contents

Binary multiply/divide by 2 (shift left or shift right)

• A sequence of bits input to a 4 bit shift register Din = [1101]

  

• If the sequence of bits to be stored is longer by 2 extra zeros, the sequence is longer than the size of the register → will lose bits

  

wire reset_m, clock, Dim;
neg [3:0] Q;
always @ (posedge clock)
	if (!reset_m)
		Q <= 0; //all three bits 
	else begin //non blocking assignment
		Q[0] <= Dim;
		Q[1] <= Q[0];
		Q[2] <= Q[1];
		Q[3] <= Q[2];
	end