Virtual Memory

Programs don’t access physical memory. Virtual addresses are translated into physical addresses by the MMU

• Each process has its own virtual address space. This allows for:
  • Ioslation
  • Portability
  • Efficient memory use
  • Protection and sharing when needed

Physical vs Virtual Addressing

• Physical addressing is hard because there is limited physical RAM, deciding what goes where for so many processes, etc
• Virtual addressing adds a level of indirection via MMU
  • Each process maps virtual memory pages to physical frames, enabling private address spaces and simplified memory management

Virtual Memory as a Cache

• Main memory acts as a cache for secondary storage (disk)
• Swapping between RAM and disk is so slow, so systems must avoid page faults (cache misses)

Page Tables and Translation

Each virtual page is mapped to a physical page via a page table

1. CPU issues virtual address
2. MMU looks up PTE
3. If valid → get physical address → fetch data
4. If invalid → trigger page fault → OS loads page from disk, updates PTE

Speeding up with a TLB

• Translation Lookaside Buffer caches recent VA → PA translations
  • TLB hit = quick translation
  • TLB miss = extra memory access to fetch PTE
• TLB reach = entries * page size
• If your working set exceeds TLB reach → more misses